Reducing instruction fetch energy in multi-issue processors
نویسندگان
چکیده
منابع مشابه
Energy-Effective Instruction Fetch Unit for Wide Issue Processors
Continuing advances in semiconductor technology and demand for higher performance will lead to more powerful, superpipelined and wider issue processors. Instruction caches in such processors will consume a significant fraction of the on-chip energy due to very wide fetch on each cycle. This paper proposes a new energy-effective design of the fetch unit that exploits the fact that not all instru...
متن کاملCacheless Instruction Fetch Mechanism for Multithreaded Processors
The speed difference between processors and memories has become to one of the biggest problem in designing memory systems. While this primarily limits fast sequential access to data in memory it also sets constraints to efficient instruction fetch. In computers using single threaded processors this latter problem has traditionally been partially solved by using instruction caches, but in fast m...
متن کاملDLL-conscious instruction fetch optimization for SMT processors
ACKNOWLEDGEMENTS There are many who have given me inspiration, guidance and provided me with professional and personal support. First of all, I would like to extend my heartfelt thanks to my parents for the unwavering support they provided me in every way possible, in order to enable me reach both educational and personal goals. I would also like to thank my brothers, for always being there whe...
متن کاملWay Memoization to Reduce Fetch Energy in Instruction Caches
Instruction caches consume a large fraction of the total power in modern low-power microprocessors. In particular, set-associative caches, which are preferred because of lower miss rates, require greater access energy on hits than direct-mapped caches; this is because of the need to locate instructions in one of several ways. Way prediction has been proposed to reduce power dissipation in conve...
متن کاملIncreasing Instruction Fetch Energy-eeciency of a Vlsi Microprocessor
VLSI devices with high power demands have several important drawbacks; power to run the chip must be supplied externally, and power is dissipated as heat, which must be removed from the circuit. Processor architects tend to view these issues as circuit technology or packaging problems. However, these solutions are limited, and do not necessarily provide insight into more direct approaches to en...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: ACM Transactions on Architecture and Code Optimization
سال: 2013
ISSN: 1544-3566,1544-3973
DOI: 10.1145/2541228.2555318